Hard disk drives are an indispensable component in most modern computing/data handling systems. The disk drive uses one or more spinning magnetic media platters to store digital data, which can be dynamically written to and read from the platter(s) using a moving read/write head assembly. A single 3-4 inch diameter platter face may store hundreds of millions, or billions, of bits of data. The data is, thus, intensely compacted into the magnetic media of the platter. As such, platters are extremely sensitive to even the smallest degree of physical contact such contact virtually guaranteeing destruction of data and possibly the destruction of the overall disk drive. For this reason, the read/write head is mounted so as to avoid contact with the spinning platter at all times, riding on a cushion of air several microns above the platter surface. In this manner, the head is still close enough to transfer magnetic signals, but far enough to prevent contact with the platter. When not in use, the head shuttles to a neutral “parked” position, typically near an inner race of the disk, where it is safely insulated from contact with the data-storing platter media.
In the event of a system failure, uncontrolled shutdown or other catastrophe, a sudden loss of power to the disk drive may occur. In such an instance, regular system power may be unavailable to park the head. In larger (PC for example) disk drives, a spindle motor back-electromotive force (BMEF), derived from the generating capability of a deenergized, rotating spindle motor, has sufficient amplitude to retract the head in the event of power failure. However, in a small-form factor drive, such as that used in a laptop computer and other portable applications, the BMEF amplitude is insufficient to be harnessed for emergency-retract purposes. Thus, to retract the head in a small-form factor drive, a special continuously pre-charged capacitor circuit is employed. When the circuit senses a loss of power, it immediately provides a large amplitude to drive the head to a parked position.
FIG. 1 shows an exemplary small-form factor disk drive assembly 100 of conventional design. A disk platter 102 (there may be several stacked together) is rotated at a high speed by a spin motor 104. A read-write head 106 (there may also be several stacked together) is mounted on a distal end of a carefully balanced moving arm 108 that traverses the surface of the disk along an arcuate path (curved arrow 109), defined by a pivot 110. The arm moves between two limit stops 112 and 114 that delineate, respectively, a maximum outer travel and maximum inward travel (to park) of the arm. A voice coil motor (VCM) 120 provides a variable magnetic force to the arm 108 to modulate its movement with respect to the platter. In this manner data stored at various concentric locations on the platter can be read or written.
The head 106 connects to a preamplifier/writer circuit 130 that amplifies data signals retrieved by the head from the platter during a read phase and that includes a digital-to-analog converter that drives data signals for transmission by the head to the platter during a write phase. Likewise, the circuit 130 connects to a read/write channel 132, which controls the transfer of data to and from the head. The channel includes an analog-to-digital converter, as well as various encoding and decoding functions of conventional design. The read/write channel 132, in turn, connects to a disk controller 134 that processes read data for trans-mission to a host computer (not shown) via an interface 136, while also processing write data from the host computer via the interface. Operation of the circuits in assembly 100 is directed under timing control of a gate array 140 configured to generate appropriate timing signals that synchronize and advance various data transfer operations and other disk operations.
A central processing unit (CPU) 150, comprising a microprocessor, microcontroller or other circuit, interconnects with various circuits as shown. The CPU 150 includes a memory 152 for storing a control program which, among other things, coordinates head movement across the platter to properly locate the head 106 for a desired read/write operation. The CPU connects to a driver circuit 160 to direct movement of both the spin motor 104 and arm/head via the VCM 120. The driver circuit 160 includes a number of conventional sub-components (not described) for effecting proper spin speed and head movement. Significantly, the driver circuit 160 includes a power-off detector (P.O. Det) 162 that senses a loss of power to the disk drive assembly and “gates” current from a capacitor of capacitor circuit 170 (described above). Using this current, the driver circuit directs the VCM to immediately park the head, before spin has ceased and before the associated air cushion between the platter and head has subsided.
A significant quantity of power is needed to guarantee rapid and full retraction of the arm in an emergency. It is desirable to reduce the size of the capacitor in circuit 170 as much as possible, thereby limiting the ability to provide a large margin of error in its charge capacity. In other words, the capacitor is sized, in small form-factor environments, much closer to a required maximum rated charge level and is maintained at a charge (during operation) quite close to that maximum. Because of its size, the capacitor is an expensive component and should be adequately protected against damage due to overcharging. In one exemplary implementation, the capacitor may have a size of approximately 300 microFarads, with a maximum breakdown voltage of approximately 6.3 Volts. The required charge for an adequate retract amplitude is approximately 5.8 Volts—thus, a relatively small safety margin in charging the capacitor is present. Where the capacitor's charging voltage closely approaches or exceeds the breakdown voltage, its reliability may be negatively affected and, long-term, it may deteriorate, leak, or even burnout.
FIG. 2 details the emergency head-retract capacitor circuit 170 that includes a voltage pump 202 for charging an emergency head-retract capacitor C1, according to the prior art. The emergency head-retract capacitor C1 is a 300-microfarad capacitor with a maximum charging voltage of 6.3 Volts in this example. The capacitor is connected on one end to a charging circuit (voltage pump 202) and on the opposing end to ground (GND). A pair of leads 208 across the capacitor C1 transmits power to head driver circuit 160 when needed for an emergency retract operation. As noted above, excess charging may cause permanent damage or even fire to occur. Thus, the capacitor is limited to an input charging voltage of approximately 5.8 Volts (2 VDD) in this example. The input voltage VDD from, e.g., a system battery or other current source is between 2.7 and 3.6 Volts. Charging of the capacitor C1 is also characterized by an in-rush current, shown as the dashed line 205, and discussed further below. As charge is “pumped” by the voltage pump 202 into the capacitor C1 (so as to be available at the outputs 208 for driving the retraction), the maximum charging voltage is regulated/limited by the pump to remain at or below specified (typically by the manufacturer of the capacitor) voltage limits. Regulation of maximum charging voltage serves to preserve and extend the life of the capacitor C1 and prevent its untimely failure.
A voltage multiplier 204 (a voltage doubler in this example) is employed to provide the desired charging voltage, which is typically greater than VDD. To control the operation of the voltage multiplier and selectively apply charge current to the emergency head-retract capacitor C1, the voltage pump 202 also employs a controller 210 that is driven by an oscillating current (500 KHz in this example). The voltage pump controller 210 can be any acceptable state-machine or processor implementation (a field programmable gate array or application-specific integrated circuit, for example). In this example, the controller is used to selectively gate an input charge current (in-rush current 205) to the emergency head-retract capacitor C1, while simultaneously multiplying (doubling) the voltage from VDD to 2 VDD. As such, the controller 210 provides an input to a driver 212 that alternatively energizes a capacitor C2 with VDD or shunts it to ground (GND). C2 is a 470-microfarad capacitor in this example. While the capacitor C2 energizes, the controller 210 simultaneously switches gate transistor P1 of voltage multiplier 204 to gate VDD to junction 214. In response to switching of the transistor P1, the capacitor C2 drains to provide a second VDD source, causing the input charge current of doubled voltage 2 VDD to flow from the junction 214. This charge current, having the predetermined pump voltage (5.8 Volts), is also simultaneously gated by a second transistor P2 (gate 250) that is selectively operated by the controller 210 to apply the charge to the emergency head-retract capacitor C1. A second lead 220 branches from junction 222 (between transistor P2 and capacitor C1) and connects to a voltage comparator 230 that compares the charging voltage at lead 220 with a reference voltage Vref. In this example, Vref is set to approximately 5.8 Volts, the maximum accepted capacitor-charging voltage. An output of the comparator 230 is fed to the controller 210. When the charging voltage at lead 220 exceeds Vref (5.8 Volts), the output of comparator 230 signals the controller 210 to cease pumping the capacitor C1 with charge. Hence the above-described circuit provides adequate protection for charging voltages in excess of the desired 5.8 Volts. This is particularly useful as VDD can sometimes approach 3.6 V (i.e. 2 VDD=7.2 Volts>5.8 maximum) under certain circumstances.
Inasmuch as the above-described circuit appropriately addresses an undesirable high charging voltage level, another symptom often associated with the initial influx of power (at startup) is an undesirably high in-rush current. The above-described circuit does not adequately address excessive in-rush current conditions, which can deteriorate and damage the capacitor in the same manner as excess voltage. In addition, the capacitor circuit described above does not adequately monitor the health of the capacitor so that catastrophic failure (such as bursting and/or fire) can be avoided.